Equalization technique is widely used in many wireline communication systems, such as digital subscribe line (DSL) systems and gigabit ethernet systems, to combat the intersymbol interference (ISI). In 10 Gigabit Ethernet over copper (10GBASE-T) system, full duplex baseband transmission is performed over four pairs of unshield twisted pair (UTP) and the received signal suffers from lots of interferences. ISI is a significant impairment against reliable high speed digital transmission over the UTP cable. To meet the desired throughput (10 Gbps) and target BER (10−12) requirements, efficient equalization is needed in the DSP transceiver design.
Traditionally, equalization is performed individually for each channel in 10GBASE-T system, where four separate feed-forward equalizers (FFE) are used at the receiver side to mitigate the pre-cursor ISI for each channel and corresponding 4 separate decision feedback equalizers (DFE) are used to deal with the post-cursor ISI. Far-end crosstalk (FEXT) is treated as noise to be cancelled after the FFE. To reduce the FEXT interference to a satisfactory level, three FEXT cancellers are needed for each pair of cables. Since there are four pairs of cables (four channels) in 10GBASE-T, a total of 12 FEXT cancellers are needed at the receiver side and each of them will have about 200 taps (See, e.g., IEEE 802.3an 10GBASE-T Tutorial, http://grouper.ieee.org/groups/802/3/tutorial/index.html, November 2003). Implementing these FEXT cancellers requires a significant amount of silicon area and power consumption. Because the input signals for FEXT cancellers are derived from the tentative decisions of the received signals and are mostly incorrect estimates of the transmitted symbols from far end, wrong signals are produced at the FEXT canceller output. This finally leads to significant performance loss in terms of SNR. We also note that the levels of FEXT varies significantly depending on cabling and connectors, especially at intermediate lengths, between 20 and 50 meters, where FEXT is a dominant issue. It is important to satisfy the performance of these transceivers at all lengths. In other words, a flexible solution needs to be found to work under different cabling environments (See, e.g., IEEE 802.3an 10GBASE-T Study Group, http://www.ieee802.org/3/an/public/material/index.html). All these make DSP transceiver design for 10GBASE-T more challenging. Thus, it is of great intest to develop new equalization schemes for the 10GBASE-T application.
What is needed is a new design methodology or technique for efficiently dealing with FEXT crosstalk that overcomes the limitation of the traditional schemes and achieve a better SNR performance and lower receiver complexity.